4 search results - page 1 / 1 » A case study of on-chip sensor network in multiprocessor sys... |
ASAP
2005
IEEE
13 years 10 months ago
2005
IEEE
We studied the dynamic instruction count reduction for a single-thread, vectorized and a multi-threaded, non-vectorized, MPEG-4 video encoder. Results indicate a maximum improveme...
DATE
2010
IEEE
13 years 9 months ago
2010
IEEE
—In this paper, we examine the design process of a Network on-Chip (NoC) for a high-end commercial System onChip (SoC) application. We present several design choices and focus on...
DSD
2008
IEEE
13 years 11 months ago
2008
IEEE
This paper proposes a system-level cycle-based framework to model and design heterogeneous Multiprocessor Systems on-Chip (MPSoC), called GRAPES. The approach features flexibilit...
CASES
2009
ACM
13 years 8 months ago
2009
ACM
Reducing feature sizes and power supply voltage allows integrating more processing units (PUs) on multiprocessor system-on-chip (MPSoC) to satisfy the increasing demands of applic...