121 search results - page 24 / 25 » A cell-based power estimation in CMOS combinational circuits |
APCCAS
2002
IEEE
13 years 10 months ago
2002
IEEE
This paper presents a 10-bit pipeline ADC using double sampling technique to achieve a conversion rate of 40 MS/s at 2.5-V supply. The opamps are two-stage with folded-cascode as ...
ISLPED
2004
ACM
13 years 11 months ago
2004
ACM
The need to perform early design studies that combine architectural simulation with power estimation has become critical as power has become a design constraint whose importance h...
ISCAS
2008
IEEE
13 years 12 months ago
2008
IEEE
— Long distance, low data-rate UWB communication for sensor network applications requires a highly energy efficient transceiver combined with circuit and system-level optimizati...
VLSISP
2010
13 years 3 months ago
2010
Abstract Polyphase channelizer is an important component of subband adaptive filtering systems. This paper presents an energy-efficient hardware architecture and VLSI implementatio...
GLVLSI
2003
IEEE
13 years 10 months ago
2003
IEEE
The use of multiple supply voltages for energy and average power reduction is well researched and several works have appeared in the literature. However, in low power design using...