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» A code compression advisory tool for embedded processors
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RSP
2000
IEEE
156views Control Systems» more  RSP 2000»
13 years 9 months ago
Quasi-Static Scheduling of Reconfigurable Dataflow Graphs for DSP Systems
Dataflow programming has proven to be popular for representing applications in rapid prototyping tools for digital signal processing (DSP); however, existing dataflow design tools...
Bishnupriya Bhattacharya, Shuvra S. Bhattacharyya
ICCAD
2004
IEEE
100views Hardware» more  ICCAD 2004»
14 years 2 months ago
DynamoSim: a trace-based dynamically compiled instruction set simulator
Instruction set simulators are indispensable tools for the architectural exploration and verification of embedded systems. Different techniques have recently been proposed to spe...
Massimo Poncino, Jianwen Zhu
DATE
2009
IEEE
176views Hardware» more  DATE 2009»
14 years 2 days ago
Automated synthesis of streaming C applications to process networks in hardware
Abstract—The demand for embedded computing power is continuously increasing and FPGAs are becoming very interesting computing platforms, as they provide huge amounts of customiza...
Sven van Haastregt, Bart Kienhuis
DAC
1997
ACM
13 years 9 months ago
InfoPad - An Experiment in System Level Design and Integration
The InfoPad project was started at UC Berkeley in 1992 to investigate the issues involved in providing multimedia information access using a portable, wireless terminal. It quickl...
Robert W. Brodersen
EUROSYS
2010
ACM
14 years 2 months ago
Reverse Engineering of Binary Device Drivers with RevNIC
This paper presents a technique that helps automate the reverse engineering of device drivers. It takes a closed-source binary driver, automatically reverse engineers the driver...
Vitaly Chipounov, George Candea