9 search results - page 1 / 2 » A coefficient segmentation algorithm for low power implement... |
ISCAS
1999
IEEE
13 years 9 months ago
1999
IEEE
The authors present a multiplication algorithm for low power implementation of digital filters on CMOS based digital signal processing systems. The algorithm decomposes individual...
VLSID
2005
IEEE
14 years 5 months ago
2005
IEEE
This paper presents two schemes for the implementation of high performance and low power FIR filtering Intellectual Property (IP) cores. Low power is achieved through the utilizat...
ISCAS
2007
IEEE
13 years 11 months ago
2007
IEEE
— The complexity of Finite Impulse Response (FIR) filters is dominated by the number of adders (subtractors) used to implement the coefficient multipliers. A greedy Common Subexp...
IEICET
2008
13 years 5 months ago
2008
Finite impulse response (FIR) filtering is the most computationally intensive operation in the channelizer of a wireless communication receiver. Higher order FIR channel filters a...
ERSA
2006
13 years 6 months ago
2006
- This paper presents the design and implementation methodology of some low power programmable FIR filtering IP cores targeting SoRC and compares their performance in term of area,...