468 search results - page 1 / 94 » A compiler for high performance computing with many-core acc... |
ISPDC
2010
IEEE
13 years 3 months ago
2010
IEEE
—Super-scalar, out-of-order processors that can have tens of read and write requests in the execution window place significant demands on Memory Level Parallelism (MLP). Multi- ...
TCAD
2010
12 years 11 months ago
2010
Abstract--This paper presents a GALS-compatible circuitswitched on-chip network that is well suited for use in many-core platforms targeting streaming DSP and embedded applications...
HOTI
2008
IEEE
13 years 5 months ago
2008
IEEE
EUROPAR
2009
Springer
13 years 11 months ago
2009
Springer
Moore’s Law suggests that the number of processing cores on a single chip increases exponentially. The future performance increases will be mainly extracted from thread-level par...
HPDC
2008
IEEE
13 years 11 months ago
2008
IEEE
The emergence of heterogeneous many core architectures presents a unique opportunity for delivering order of magnitude performance increases to high performance applications by ma...