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ISQED
2007
IEEE
160views Hardware» more  ISQED 2007»
13 years 11 months ago
On-Chip Inductance in X Architecture Enabled Design
The inductance effects become significant for sub-100nm process designs due to increasing interconnect lengths, lower interconnect resistance values and fast signal transition tim...
Santosh Shah, Arani Sinha, Li Song, Narain D. Aror...
TCAD
2002
137views more  TCAD 2002»
13 years 5 months ago
Generalized traveling-wave-based waveform approximation technique for the efficient signal integrity verification of multicouple
As very large scale integration (VLSI) circuit speed rapidly increases, the inductive effects of interconnect lines strongly impact the signal integrity of a circuit. Since these i...
Yungseon Eo, Seongkyun Shin, William R. Eisenstadt...
DELTA
2008
IEEE
13 years 11 months ago
Compact Models for Signal Transient and Crosstalk Noise of Coupled RLC Interconnect Lines with Ramp Inputs
Analytical compact form models for the signal transient and crosstalk noise of two-coupled RLC lines are developed. Capacitive and inductive coupling effects are investigated and ...
Taehoon Kim, Dongchul Kim, Jung-A Lee, Yungseon Eo
ICCAD
2004
IEEE
139views Hardware» more  ICCAD 2004»
14 years 2 months ago
Fast simulation of VLSI interconnects
This paper introduces an efficient and accurate interconnect simulation technique. A new formulation for typical VLSI interconnect structures is proposed which, in addition to pr...
Jitesh Jain, Cheng-Kok Koh, Venkataramanan Balakri...
ICCAD
2005
IEEE
101views Hardware» more  ICCAD 2005»
14 years 2 months ago
FastSies: a fast stochastic integral equation solver for modeling the rough surface effect
In this paper we describe several novel sparsification techniques used in a Fast Stochastic Integral Equation Solver to compute the mean value and the variance of capacitance of ...
Zhenhai Zhu, Jacob K. White