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ICCAD
2001
IEEE
107views Hardware» more  ICCAD 2001»
14 years 2 months ago
Fast 3-D Inductance Extraction in Lossy Multi-Layer Substrate
A mixed potential integral equation (MPIE) technique combined with fast multi-layer Green’s functions and Gaussian Jacobi high order techniques is used to compute the 3-D freque...
Minqing Liu, Tiejun Yu, Wayne Wei-Ming Dai
SLIP
2003
ACM
13 years 11 months ago
Fast estimation of the partitioning rent characteristic using a recursive partitioning model
In the past, a priori interconnect prediction, based on Rent’s rule, has been applied mainly for technology evaluation and roadmap applications. These applications do not requir...
Joni Dambre, Dirk Stroobandt, Jan Van Campenhout
ASPDAC
2006
ACM
122views Hardware» more  ASPDAC 2006»
14 years 13 hour ago
IEEE standard 1500 compatible interconnect diagnosis for delay and crosstalk faults
– We propose an interconnect diagnosis scheme based on Oscillation Ring test methodology for SOC design with heterogeneous cores. The target fault models are delay faults and cro...
Katherine Shu-Min Li, Yao-Wen Chang, Chauchin Su, ...
ISPASS
2009
IEEE
14 years 25 days ago
GARNET: A detailed on-chip network model inside a full-system simulator
Until very recently, microprocessor designs were computation-centric. On-chip communication was frequently ignored. This was because of fast, single-cycle on-chip communication. T...
Niket Agarwal, Tushar Krishna, Li-Shiuan Peh, Nira...
DATE
2007
IEEE
118views Hardware» more  DATE 2007»
14 years 11 days ago
Statistical model order reduction for interconnect circuits considering spatial correlations
In this paper, we propose a novel statistical model order reduction technique, called statistical spectrum model order reduction (SSMOR) method, which considers both intra-die and...
Jeffrey Fan, Ning Mi, Sheldon X.-D. Tan, Yici Cai,...