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ISCA
2009
IEEE
173views Hardware» more  ISCA 2009»
13 years 11 months ago
A fault tolerant, area efficient architecture for Shor's factoring algorithm
Mark Whitney, Nemanja Isailovic, Yatish Patel, Joh...
MSS
2003
IEEE
113views Hardware» more  MSS 2003»
13 years 10 months ago
Design and Implementation of Multiple Addresses Parallel Transmission Architecture for Storage Area Network
In this paper, we present a parallel transmission architecture for SAN. By using two schedulers on the destination and source addresses of packets, the load of multiple data flows...
Bin Meng, Patrick B. T. Khoo, T. C. Chong
SEC
2008
13 years 6 months ago
A Fuzzy Model for the Composition of Intrusion Detectors
The performance of an intrusion detector depends on several factors, like its internal architecture and the algorithms it uses. Thus, distinct detectors can behave distinctly when ...
Inez Raguenet, Carlos Maziero
DAC
2010
ACM
13 years 8 months ago
LUT-based FPGA technology mapping for reliability
As device size shrinks to the nanometer range, FPGAs are increasingly prone to manufacturing defects. We anticipate that the ability to tolerate multiple defects will be very impo...
Jason Cong, Kirill Minkovich
ICUMT
2009
13 years 2 months ago
A scalable based multicast model for P2P Conferencing applications
Multicast conferencing is a rapidly-growing area of Internet use. Audio, video and other media such as shared whiteboard data can be distributed efficiently between groups of confe...
Mourad Amad, Zahir Haddad, Lachemi Khenous, Kamal ...