—We propose a frequency-domain modeling technique with applications on the statistical timing analysis of clock mesh/grid networks. Using transmission lines to model clock mesh e...
—In network measurement systems, packet sampling techniques are usually adopted to reduce the overall amount of data to collect and process. Being based on a subset of packets, t...
Clock meshes have found increasingly wide applications in today’s high-performance IC designs. The inherent routing redundancies associated with clock meshes lead to improved cl...
Xiaoji Ye, Min Zhao, Rajendran Panda, Peng Li, Jia...
: In chip design, one of the main objectives is to decrease its clock cycle; however, the existing approaches to timing analysis under uncertainty are based on fundamentally restri...
Michael Orshansky, Wei-Shen Wang, Martine Ceberio,...
In this paper, we derive a statistical delay guarantee of the generalized Virtual Clock scheduling algorithm. We define the concept of an equivalent fluid and packet source and pr...