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» A low power architecture for embedded perception
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2004
ACM
13 years 11 months ago
A Performance and Scalability Analysis of the BlueGene/L Architecture
This paper is structured as follows. Section 2 gives an architectural description of BlueGene/L. Section 3 analyzes the issue of “computational noise” – the effect that the o...
Kei Davis, Adolfy Hoisie, Greg Johnson, Darren J. ...
ARCS
2004
Springer
13 years 9 months ago
Towards a Dynamically Reconfigurable System-on-Chip Platform for Video Signal Processing
: This paper reports ongoing work towards a dynamically reconfigurable System-on-Chip (SoC) platform for video signal processing. It consists of dedicated, statically and dynamical...
Walter Stechele, Stephan Herrmann, Andreas Herkers...
ISLPED
2005
ACM
150views Hardware» more  ISLPED 2005»
13 years 11 months ago
Fast configurable-cache tuning with a unified second-level cache
Tuning a configurable cache subsystem to an application can greatly reduce memory hierarchy energy consumption. Previous tuning methods use a level one configurable cache only, or...
Ann Gordon-Ross, Frank Vahid, Nikil D. Dutt
VLSID
2008
IEEE
120views VLSI» more  VLSID 2008»
14 years 6 months ago
Continuous Frequency Adjustment Technique Based on Dynamic Workload Prediction
Real-time embedded systems increasingly rely on dynamic power management to balance between power and performance goals. In this paper, we present a technique for continuous frequ...
Hwisung Jung, Massoud Pedram
ICCD
2005
IEEE
165views Hardware» more  ICCD 2005»
14 years 2 months ago
Applying Resource Sharing Algorithms to ADL-driven Automatic ASIP Implementation
Presently, Architecture Description Languages (ADLs) are widely used to raise the abstraction level of the design space exploration of Application Specific Instruction-set Proces...
Ernst Martin Witte, Anupam Chattopadhyay, Oliver S...