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VLSI
2007
Springer
13 years 10 months ago
A low-power deblocking filter architecture for H.264 advanced video coding
Abstract— In this paper, a low-power deblocking filter architecture for H.264/AVC is proposed. A hybrid filtering order has been adopted to boost the speed of the deblocking ...
Jaemoon Kim, Sangkwon Na, Chong-Min Kyung
ASPDAC
2006
ACM
140views Hardware» more  ASPDAC 2006»
13 years 10 months ago
A near optimal deblocking filter for H.264 advanced video coding
- We propose a near optimal hardware architecture for deblocking filter in H.264/MPEG-4 AVC. We propose a novel filtering order and a data reuse strategy that result in significant...
Shen-Yu Shih, Cheng-Ru Chang, Youn-Long Lin
AHS
2006
IEEE
195views Hardware» more  AHS 2006»
13 years 10 months ago
An Efficient Hardware Architecture for H.264 Adaptive Deblocking Filter
This paper presents an efficient hardware architecture for real-time implementation of adaptive deblocking filter algorithm used in H.264 video coding standard. This hardware is d...
Mustafa Parlak, Ilker Hamzaoglu
DSD
2008
IEEE
168views Hardware» more  DSD 2008»
13 years 6 months ago
Analyzing Scalability of Deblocking Filter of H.264 via TLP Exploitation in a New Many-Core Architecture
In this paper we present results of parallelization of Deblocking Filter (DF) of H.264 video codec on Decoupled Threaded Architecture (DTA). We parallelized the code trying to exp...
Roberto Giorgi, Zdravko Popovic, Nikola Puzovic, A...
TVLSI
2008
117views more  TVLSI 2008»
13 years 4 months ago
Configurable VLSI Architecture for Deblocking Filter in H.264/AVC
In this paper, we study and analyze the computational complexity of the deblocking filter in H.264/AVC baseline decoder based on SimpleScalar/ARM simulator. The simulation result s...
Chung-Ming Chen, Chung-Ho Chen