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» A memory grouping method for sharing memory BIST logic
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ASPDAC
2006
ACM
117views Hardware» more  ASPDAC 2006»
13 years 11 months ago
A memory grouping method for sharing memory BIST logic
- With the increasing demand for SoCs to include rich functionality, SoCs are being designed with hundreds of small memories with different sizes and frequencies. If memory BIST lo...
Masahide Miyazaki, Tomokazu Yoneda, Hideo Fujiwara
ASPLOS
2010
ACM
13 years 10 months ago
An asymmetric distributed shared memory model for heterogeneous parallel systems
Heterogeneous computing combines general purpose CPUs with accelerators to efficiently execute both sequential control-intensive and data-parallel phases of applications. Existin...
Isaac Gelado, Javier Cabezas, Nacho Navarro, John ...
FMICS
2010
Springer
13 years 3 months ago
A Study of Shared-Memory Mutual Exclusion Protocols Using CADP
Mutual exclusion protocols are an essential building block of concurrent systems: indeed, such a protocol is required whenever a shared resource has to be protected against concurr...
Radu Mateescu, Wendelin Serwe
ISCA
2012
IEEE
279views Hardware» more  ISCA 2012»
11 years 7 months ago
Staged memory scheduling: Achieving high performance and scalability in heterogeneous systems
When multiple processor (CPU) cores and a GPU integrated together on the same chip share the off-chip main memory, requests from the GPU can heavily interfere with requests from t...
Rachata Ausavarungnirun, Kevin Kai-Wei Chang, Lava...
SAS
2010
Springer
262views Formal Methods» more  SAS 2010»
13 years 3 months ago
Concurrent Separation Logic for Pipelined Parallelization
Recent innovations in automatic parallelizing compilers are showing impressive speedups on multicore processors using shared memory with asynchronous channels. We have formulated a...
Christian J. Bell, Andrew W. Appel, David Walker