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» A memory system design framework: creating smart memories
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DSN
2006
IEEE
14 years 2 days ago
Dynamic Verification of Memory Consistency in Cache-Coherent Multithreaded Computer Architectures
—Multithreaded servers with cache-coherent shared memory are the dominant type of machines used to run critical network services and database management systems. To achieve the h...
Albert Meixner, Daniel J. Sorin
DATE
2003
IEEE
122views Hardware» more  DATE 2003»
13 years 11 months ago
A General Framework for Analysing System Properties in Platform-Based Embedded System Designs
We present a framework (Real-Time Calculus) for analysing various system properties pertaining to timing analysis, loads on various components and on-chip buffer memory requiremen...
Samarjit Chakraborty, Simon Künzli, Lothar Th...
CODES
2002
IEEE
13 years 11 months ago
Hardware support for real-time embedded multiprocessor system-on-a-chip memory management
The aggressive evolution of the semiconductor industry — smaller process geometries, higher densities, and greater chip complexity — has provided design engineers the means to...
Mohamed Shalan, Vincent John Mooney III
EUROSYS
2007
ACM
14 years 3 months ago
Removing the memory limitations of sensor networks with flash-based virtual memory
Virtual memory has been successfully used in different domains to extend the amount of memory available to applications. We have adapted this mechanism to sensor networks, where,...
Andreas Lachenmann, Pedro José Marró...
DATE
2010
IEEE
110views Hardware» more  DATE 2010»
13 years 11 months ago
An RDL-configurable 3D memory tier to replace on-chip SRAM
—In a conventional SoC designs, on-chip memories occupy more than the 50% of the total die area. 3D technology enables the distribution of logic and memories on separate stacked ...
Marco Facchini, Paul Marchal, Francky Catthoor, Wi...