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» A memory-reduced log-MAP kernel for turbo decoder
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ISCAS
2005
IEEE
112views Hardware» more  ISCAS 2005»
13 years 10 months ago
A memory-reduced log-MAP kernel for turbo decoder
Tsung-Han Tsai, Cheng-Hung Lin, An-Yeu Wu
SIPS
2008
IEEE
13 years 11 months ago
Unified decoder architecture for LDPC/turbo codes
Low-density parity-check (LDPC) codes on par with convolutional turbo codes (CTC) are two of the most powerful error correction codes known to perform very close to the Shannon li...
Yang Sun, Joseph R. Cavallaro