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» A meta-level true random number generator
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CHES
2007
Springer
328views Cryptology» more  CHES 2007»
13 years 12 months ago
High-Speed True Random Number Generation with Logic Gates Only
It is shown that the amount of true randomness produced by the recently introduced Galois and Fibonacci ring oscillators can be evaluated experimentally by restarting the oscillato...
Markus Dichtl, Jovan Dj. Golic
DDECS
2008
IEEE
227views Hardware» more  DDECS 2008»
13 years 7 months ago
Cryptographic System on a Chip based on Actel ARM7 Soft-Core with Embedded True Random Number Generator
The paper introduces a cryptographic System on a Chip (SoC) implementation based on recent Actel nonvolatile FPGA Fusion chip with embedded ARM7 soft-core processor. The SoC is bui...
Milos Drutarovsky, Michal Varchola
FPGA
2004
ACM
234views FPGA» more  FPGA 2004»
13 years 9 months ago
An embedded true random number generator for FPGAs
Field Programmable Gate Arrays (FPGAs) are an increasingly popular choice of platform for the implementation of cryptographic systems. Until recently, designers using FPGAs had le...
Paul Kohlbrenner, Kris Gaj
GLVLSI
2009
IEEE
170views VLSI» more  GLVLSI 2009»
13 years 9 months ago
Physical unclonable function and true random number generator: a compact and scalable implementation
Physical Unclonable Functions (PUF) and True Random Number Generators (TRNG) are two very useful components in secure system design. PUFs can be used to extract chip-unique signat...
Abhranil Maiti, Raghunandan Nagesh, Anand Reddy, P...
CHES
2010
Springer
193views Cryptology» more  CHES 2010»
13 years 7 months ago
New High Entropy Element for FPGA Based True Random Number Generators
Michal Varchola, Milos Drutarovsky