34 search results - page 1 / 7 » A methodology for the characterization of process variation ... |
DATE
2010
IEEE
13 years 9 months ago
2010
IEEE
—Associated with the ever growing integration scales is the increase in process variability. In the context of networkon-chip, this variability affects the maximum frequency that...
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
We present the implementation and analysis of a variation tolerant version of a switch-to-switch link in a NoC. The goal is to tolerate the effects of process variations on NoC ar...
ISQED
2007
IEEE
13 years 11 months ago
2007
IEEE
Abstract—A Network-on-Chip (NoC) replaces on-chip communication implemented by point-to-point interconnects in a multi-core environment by a set of shared interconnects connected...
ISQED
2008
IEEE
13 years 11 months ago
2008
IEEE
— Designers require variational information for robust designs. Characterization of such information can be costly for the novel nanoparticle interconnect process, which utilize ...
DAC
2006
ACM
14 years 5 months ago
2006
ACM
As VLSI technology scales toward 65nm and beyond, both timing and power performance of integrated circuits are increasingly affected by process variations. In practice, people oft...