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GLVLSI
2000
IEEE
105views VLSI» more  GLVLSI 2000»
13 years 9 months ago
An evolutionary approach to timing driven FPGA placement
: We propose a novel evolutionary approach to the problem of timing-driven FPGA placement. The method used is evolutionary programming (EP) with incremental position encoded in the...
R. Venkatraman, Lalit M. Patnaik
ICCAD
2006
IEEE
123views Hardware» more  ICCAD 2006»
14 years 1 months ago
A network-flow approach to timing-driven incremental placement for ASICs
We present a novel incremental placement methodology called FlowPlace for significantly reducing critical path delays of placed standard-cell circuits. FlowPlace includes: a) a t...
Shantanu Dutt, Huan Ren, Fenghua Yuan, Vishal Suth...