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9

GLVLSI
2000
IEEE

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An evolutionary approach to timing driven FPGA placement

13 years 9 months ago

An evolutionary approach to timing driven FPGA placement

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: We propose a novel evolutionary approach to the problem of timing-driven FPGA placement. The method used is evolutionary programming (EP) with incremental position encoded in the population. This uses considerably less memory compared to a method with direct position-encoding for members of the population. The algorithm has been implemented in C++, and the results on MCNC benchmark circuits are presented. The results are superior to those obtained using conventional Simulated Annealing (SA) based approach. The results of an EP-SA approach using the proposed evolutionary programming method are also presented.

R. Venkatraman, Lalit M. Patnaik

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Evolutionary Programming | Evolutionary Programming Method | GLVLSI 2000 | Timing-driven Fpga Placement | VLSI |

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Added	31 Jul 2010
Updated	31 Jul 2010
Type	Conference
Year	2000
Where	GLVLSI
Authors	R. Venkatraman, Lalit M. Patnaik

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