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» A new look at hardware maze routing
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DAC
2006
ACM
14 years 5 months ago
BoxRouter: a new global router based on box expansion and progressive ILP
In this paper, we propose a new global router, BoxRouter, powered by the concept of box expansion and progressive integer linear programming (ILP). BoxRouter first uses a simple P...
Minsik Cho, David Z. Pan
ASPDAC
2006
ACM
120views Hardware» more  ASPDAC 2006»
13 years 10 months ago
A novel framework for multilevel full-chip gridless routing
— Due to its great flexibility, gridless routing is desirable for nanometer circuit designs that use variable wire widths and spacings. Nevertheless, it is much more difficult ...
Tai-Chen Chen, Yao-Wen Chang, Shyh-Chang Lin
MICRO
2010
IEEE
153views Hardware» more  MICRO 2010»
13 years 2 months ago
Throughput-Effective On-Chip Networks for Manycore Accelerators
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
Ali Bakhoda, John Kim, Tor M. Aamodt