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SAC
2006
ACM
11 years 5 months ago
A new method of generating synchronizable test sequences that detect output-shifting faults based on multiple UIO sequences
The objective of testing is to determine the conformance between a system and its specification. When testing distributed systems, the existence of multiple testers brings out the...
Kai Chen, Fan Jiang, Chuan-dong Huang
PTS
1993
106views Hardware» more  PTS 1993»
11 years 6 months ago
Generating Synchronizable Test Sequences Based on Finite State Machine with Distributed Ports
In the area of testing communication systems, the interfaces between systems to be tested and their testers have great impact on test generation and fault detectability. Several t...
Gang Luo, Rachida Dssouli, Gregor von Bochmann, Pa...
DATE
1999
IEEE
120views Hardware» more  DATE 1999»
11 years 9 months ago
FreezeFrame: Compact Test Generation Using a Frozen Clock Strategy
Test application time is an important factor in the overall cost of VLSI chip testing. We present a new ATPG approach for generating compact test sequences for sequential circuits...
Yanti Santoso, Matthew C. Merten, Elizabeth M. Rud...
TCAD
2008
114views more  TCAD 2008»
11 years 5 months ago
Test-Quality/Cost Optimization Using Output-Deviation-Based Reordering of Test Patterns
At-speed functional testing, delay testing, and n-detection test sets are being used today to detect deep submicrometer defects. However, the resulting test data volumes are too hi...
Zhanglei Wang, Krishnendu Chakrabarty
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