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EUROPAR
2010
Springer
13 years 6 months ago
Thread Owned Block Cache: Managing Latency in Many-Core Architecture
Abstract. Shared last level cache is crucial to performance. However, multithread program model incurs serious contention in shared cache. In this paper, to reduce average cache ac...
Fenglong Song, Zhiyong Liu, Dongrui Fan, Hao Zhang...
HPCA
2009
IEEE
14 years 5 months ago
A novel architecture of the 3D stacked MRAM L2 cache for CMPs
Magnetic Random Access Memory (MRAM) is considered to be a promising future memory technology due to its low leakage power, high density and fast read speed. The heterogeneous int...
Guangyu Sun, Xiangyu Dong, Yuan Xie, Jian Li, Yira...
ICPP
2005
IEEE
13 years 11 months ago
Toward Effective NIC Caching: A Hierarchical Data Cache Architecture for iSCSI Storage Servers
In this paper, we present a hierarchical Data Cache Architecture called DCA to effectively slash local interconnect traffic and thus boost the storage server performance. DCA is ...
Xiaoyu Yao, Jun Wang
CITA
2005
IEEE
13 years 11 months ago
Cache Hierarchy Inspired Compression: a Novel Architecture for Data Streams
- We present an architecture for data streams based on structures typically found in web cache hierarchies. The main idea is to build a meta level analyser from a number of levels ...
Geoffrey Holmes, Bernhard Pfahringer, Richard Kirk...
RIDE
1998
IEEE
13 years 9 months ago
Performance Enhancement Using Intra-server Caching in a Continuous Media Server
Continuity of stream playback is the crucial constraint in designing a continuous media server. From a distributed memory architectural model developed earlier, we found that ther...
Chutimet Srinilta, Alok N. Choudhary