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ISCAS
2002
IEEE
118views Hardware» more  ISCAS 2002»
13 years 10 months ago
A power-configurable bus for embedded systems
Pre-designed configurable platforms, possessing microprocessors, memories, and numerous peripherals on a single chip, are increasing in popularity in embedded system design. Platf...
Chuanjun Zhang, Frank Vahid
SIES
2010
IEEE
13 years 2 months ago
Verification of a CAN bus model in SystemC with functional coverage
Abstract--Many heterogeneous embedded systems, for example industrial automation and automotive applications, require hard-real time constraints to be exhaustively verified - which...
Christoph Kuznik, Gilles B. Defo, Wolfgang Mü...
HIPEAC
2005
Springer
13 years 10 months ago
Power Aware External Bus Arbitration for System-on-a-Chip Embedded Systems
Abstract. Power efficiency has become a key design trade-off in embedded system designs. For system-on-a-chip embedded systems, an external bus interconnects embedded processor co...
Ke Ning, David R. Kaeli
DATE
2000
IEEE
119views Hardware» more  DATE 2000»
13 years 9 months ago
Bus Access Optimization for Distributed Embedded Systems Based on Schedulability Analysis
We present an approach to bus access optimization and schedulability analysis for the synthesis of hard real-time distributed embedded systems. The communication model is based on...
Paul Pop, Petru Eles, Zebo Peng
CODES
2002
IEEE
13 years 10 months ago
Holistic scheduling and analysis of mixed time/event-triggered distributed embedded systems
This paper deals with specific issues related to the design of distributed embedded systems implemented with mixed, eventtriggered and time-triggered task sets, which communicate ...
Traian Pop, Petru Eles, Zebo Peng