41 search results - page 4 / 9 » A retargetable micro-architecture simulator |
DAC
2002
ACM
14 years 6 months ago
2002
ACM
In the last decade, instruction-set simulators have become an essential development tool for the design of new programmable architectures. Consequently, the simulator performance ...
FDL
2007
IEEE
13 years 11 months ago
2007
IEEE
—This paper presents Anahita Processor Description Language (APDL) for generation of retargetable processor design tool sets. The emphasis is on the applicability of the generate...
DAC
2003
ACM
14 years 6 months ago
2003
ACM
A binary decoder is a common component of software development tools such as instruction set simulators, disassemblers and debuggers. The efficiency of the decoder can have a sign...
CGO
2003
IEEE
13 years 10 months ago
2003
IEEE
Software dynamic translation (SDT) is a technology that permits the modification of an executing program’s instructions. In recent years, SDT has received increased attention, f...
CODES
2005
IEEE
13 years 11 months ago
2005
IEEE
In order to meet flexibility, performance and energy efficiency constraints, future SoC (System-on-Chip) designs will contain an increasing number of heterogeneous processor cor...