44 search results - page 9 / 9 » A reuse scenario for the VHDL-based hardware design flow |
DRM
2005
Springer
13 years 11 months ago
2005
Springer
The domain of digital rights management (DRM) is currently lacking a generic architecture that supports interoperability and reuse of specific DRM technologies. This lack of arch...
DAC
2004
ACM
14 years 6 months ago
2004
ACM
Efficient energy and performance estimation of embedded software is a critical part of any system-level design flow. Macromodeling based estimation is an attempt to speed up estim...
DSD
2010
IEEE
13 years 6 months ago
2010
IEEE
—Periodic on-chip scan-based tests have to be applied to a many-core processor SoC to improve its dependability. An infrastructural IP module has been designed and incorporated i...
ASPDAC
2005
ACM
13 years 11 months ago
2005
ACM
– Reducing power consumption through high-level synthesis has attracted a growing interest from researchers due to its large potential for power reduction. In this work we study ...