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ICCAD
1996
IEEE
151views Hardware» more  ICCAD 1996»
13 years 9 months ago
Expected current distributions for CMOS circuits
The analysis of CMOS VLSI circuit switching current has become an increasingly important and difficult task from both a VLSI design and simulation software perspective. This paper...
Dennis J. Ciplickas, Ronald A. Rohrer
DATE
2009
IEEE
163views Hardware» more  DATE 2009»
14 years 11 days ago
Fixed points for multi-cycle path detection
—Accurate timing analysis is crucial for obtaining the optimal clock frequency, and for other design stages such as power analysis. Most methods for estimating propagation delay ...
Vijay D'Silva, Daniel Kroening
VLSID
2002
IEEE
136views VLSI» more  VLSID 2002»
14 years 6 months ago
Buffered Routing Tree Construction under Buffer Placement Blockages
Interconnect delay has become a critical factor in determining the performance of integrated circuits. Routing and buffering are powerful means of improving the circuit speed and ...
Wei Chen, Massoud Pedram, Premal Buch
ICCAD
2010
IEEE
125views Hardware» more  ICCAD 2010»
13 years 3 months ago
Peak current reduction by simultaneous state replication and re-encoding
Reducing circuit's peak current plays an important role in circuit reliability in deep sub-micron era. For sequential circuits, it is observed that the peak current has a str...
Junjun Gu, Gang Qu, Lin Yuan, Qiang Zhou
CORR
2006
Springer
125views Education» more  CORR 2006»
13 years 5 months ago
Reversible Logic to Cryptographic Hardware: A New Paradigm
Differential Power Analysis (DPA) presents a major challenge to mathematically-secure cryptographic protocols. Attackers can break the encryption by measuring the energy consumed i...
Himanshu Thapliyal, Mark Zwolinski