3 search results - page 1 / 1 » A sparsified vector potential equivalent circuit model for m... |
ISCAS
2005
IEEE
13 years 10 months ago
2005
IEEE
ASPDAC
2005
ACM
13 years 7 months ago
2005
ACM
— We develop a realizable circuit reduction to generate the interconnect macro-model for parasitic estimation in wideband applications. The inductance is represented by VPEC (vec...
ICCAD
2002
IEEE
14 years 1 months ago
2002
IEEE
A novel circuit topology for inductive coupling between interconnecting wires is presented. The model is local, i.e., only coupling between neighboring wires is explicitly modeled...