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ISSS
1995
IEEE
115views Hardware» more  ISSS 1995»
13 years 8 months ago
A system level design methodology for the optimization of heterogeneous multiprocessors
This paper presents a system level design methodology and its implementation as CAD tool for the optimization of heterogeneous multiprocessor systems. These heterogeneous systems,...
Markus Schwiegershausen, Peter Pirsch
CODES
2002
IEEE
13 years 9 months ago
Metrics for design space exploration of heterogeneous multiprocessor embedded systems
This paper considers the problem of designing heterogeneous multiprocessor embedded systems. The focus is on a step of the design flow: the definition of innovative metrics for th...
Donatella Sciuto, Fabio Salice, Luigi Pomante, Wil...
ICCD
2006
IEEE
117views Hardware» more  ICCD 2006»
14 years 1 months ago
System-Level Energy Modeling for Heterogeneous Reconfigurable Chip Multiprocessors
—Field-Programmable Gate Array (FPGA) technology is characterized by continuous improvements that provide new opportunities in system design. Multiprocessors-ona-Programmable-Chi...
Xiaofang Wang, Sotirios G. Ziavras
HICSS
2006
IEEE
164views Biometrics» more  HICSS 2006»
13 years 11 months ago
A Methodology for Generating Application-Specific Heterogeneous Processor Arrays
Hardware designers are increasingly turning to Single Chip Multi-Processors to achieve power and throughput goals. To further increase performance for a specific application the c...
Stephen D. Craven, Cameron Patterson, Peter M. Ath...
DATE
2006
IEEE
171views Hardware» more  DATE 2006»
13 years 11 months ago
4G applications, architectures, design methodology and tools for MPSoC
transistors the design of the SoC needs to be moved to a higher level of abstraction. We need to think in processors and interconnects rather than gates and wires. We discuss the n...