10 search results - page 1 / 2 » A testability metric for path delay faults and its applicati... |
ASPDAC
2000
ACM
13 years 9 months ago
2000
ACM
VTS
2000
IEEE
13 years 9 months ago
2000
IEEE
1 This paper addresses the problem of testing path delay faults in a microprocessor using instructions. It is observed that a structurally testable path (i.e., a path testable thro...
ETS
2006
IEEE
13 years 11 months ago
2006
IEEE
BIST is an attractive approach to detect delay faults due to its inherent support for at-speed test. Deterministic logic BIST (DLBIST) is a technique which was successfully applie...
MASS
2010
13 years 2 months ago
2010
Abstract--We present a new scheme to reduce the end-toend routing delay in the mission-critical applications of the wireless sensor networks (WSNs) under the duty cycle model. Whil...
ISLPED
2006
ACM
13 years 10 months ago
2006
ACM
Sub-threshold operation is a compelling approach for energyconstrained applications, but increased sensitivity to variation must be mitigated. We explore variability metrics and t...