2 search results - page 1 / 1 » A wideband hierarchical circuit reduction for massively coup... |
ASPDAC
2005
ACM
13 years 6 months ago
2005
ACM
— We develop a realizable circuit reduction to generate the interconnect macro-model for parasitic estimation in wideband applications. The inductance is represented by VPEC (vec...
ASPDAC
2008
ACM
13 years 7 months ago
2008
ACM
In this paper, we propose a new model order reduction approach for large interconnect circuits using hierarchical decomposition and Krylov subspace projection-based model order re...