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» ACV: an arithmetic circuit verifier
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DAC
1996
ACM
13 years 9 months ago
Bit-Level Analysis of an SRT Divider Circuit
Abstract-- It is impractical to verify multiplier or divider circuits entirely at the bit-level using ordered Binary Decision Diagrams (BDDs), because the BDD representations for t...
Randal E. Bryant
IOLTS
2008
IEEE
117views Hardware» more  IOLTS 2008»
13 years 11 months ago
Verification and Analysis of Self-Checking Properties through ATPG
Present and future semiconductor technologies are characterized by increasing parameters variations as well as an increasing susceptibility to external disturbances. Transient err...
Marc Hunger, Sybille Hellebrand
ICALP
2010
Springer
13 years 7 months ago
From Secrecy to Soundness: Efficient Verification via Secure Computation
d Abstract) Benny Applebaum1 , Yuval Ishai2 , and Eyal Kushilevitz3 1 Computer Science Department, Weizmann Institute of Science 2 Computer Science Department, Technion and UCLA 3 ...
Benny Applebaum, Yuval Ishai, Eyal Kushilevitz