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HPCA
2011
IEEE
12 years 9 months ago
A new server I/O architecture for high speed networks
Traditional architectural designs are normally focused on CPUs and have been often decoupled from I/O considerations. They are inefficient for high-speed network processing with a...
Guangdeng Liao, Xia Znu, Laxmi N. Bhuyan
IPPS
2010
IEEE
13 years 3 months ago
Structuring the execution of OpenMP applications for multicore architectures
Abstract--The now commonplace multi-core chips have introduced, by design, a deep hierarchy of memory and cache banks within parallel computers as a tradeoff between the user frien...
François Broquedis, Olivier Aumage, Brice G...
CF
2008
ACM
13 years 7 months ago
Multi-terabit ip lookup using parallel bidirectional pipelines
To meet growing terabit link rates, highly parallel and scalable architectures are needed for IP lookup engines in next generation routers. This paper proposes an SRAM-based multi...
Weirong Jiang, Viktor K. Prasanna
HPCA
2009
IEEE
14 years 5 months ago
Techniques for bandwidth-efficient prefetching of linked data structures in hybrid prefetching systems
Linked data structure (LDS) accesses are critical to the performance of many large scale applications. Techniques have been proposed to prefetch such accesses. Unfortunately, many...
Eiman Ebrahimi, Onur Mutlu, Yale N. Patt
CASES
2008
ACM
13 years 7 months ago
SoC-C: efficient programming abstractions for heterogeneous multicore systems on chip
fficient Programming Abstractions for Heterogeneous Multicore Systems on Chip Alastair D. Reid Krisztian Flautner Edmund Grimley-Evans ARM Ltd Yuan Lin University of Michigan The ...
Alastair D. Reid, Krisztián Flautner, Edmun...