108 search results - page 1 / 22 » Achieving efficient register allocation via parallelism |
SAC
1995
ACM
13 years 9 months ago
1995
ACM
ACSC
2004
IEEE
13 years 9 months ago
2004
IEEE
When modern processors keep increasing the instruction window size and the issue width to exploit more instruction-level parallelism (ILP), the demand of larger physical register ...
IEEEPACT
2000
IEEE
13 years 10 months ago
2000
IEEE
Modern computers have taken advantage of the instruction-level parallelism (ILP) available in programs with advances in both architecture and compiler design. Unfortunately, large...
HPCA
1998
IEEE
13 years 9 months ago
1998
IEEE
A novel dynamic register renaming approach is proposed in this work. The key idea of the novel scheme is to delay the allocation of physical registers until a late stage in the pi...
PLDI
2004
ACM
13 years 11 months ago
2004
ACM
+ Modern network processors employ multi-threading to allow concurrency amongst multiple packet processing tasks. We studied the properties of applications running on the network p...