38 search results - page 2 / 8 » Activity Packing in FPGAs for Leakage Power Reduction |
DAC
2006
ACM
14 years 6 months ago
2006
ACM
Transistor leakage is poised to become the dominant source of power dissipation in digital systems, and reconfigurable devices are not immune to this problem. Modern FPGAs already...
DATE
2002
IEEE
13 years 10 months ago
2002
IEEE
We present a Dynamic VTH Scaling (DVTS) scheme to save the leakage power during active mode of the circuit. The power saving strategy of DVTS is similar to that of the Dynamic VDD...
DAC
2005
ACM
14 years 6 months ago
2005
ACM
: Due to exponential increase in subthreshold leakage with technology scaling and temperature increase, leakage power is becoming a major fraction of total power in the active mode...
ICCD
2004
IEEE
14 years 2 months ago
2004
IEEE
Leakage current is a key factor in IC power consumption even in the active operating mode. We investigate the simultaneous optimization of gate size and threshold voltage to reduc...
ICCD
2008
IEEE
14 years 2 months ago
2008
IEEE
— Run-time Active Leakage Reduction (RALR) is a recent technique and aims at aggressively reducing leakage power consumption. This paper studies the feasibility of RALR from the ...