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SBACPAD
2003
IEEE
135views Hardware» more  SBACPAD 2003»
13 years 10 months ago
Adaptive Compressed Caching: Design and Implementation
In this paper, we reevaluate the use of adaptive compressed caching to improve system performance through the reduction of accesses to the backing stores. We propose a new adaptab...
Rodrigo S. de Castro, Alair Pereira do Lago, Dilma...
DCC
2008
IEEE
13 years 6 months ago
Design and Implementation of a High-Performance Microprocessor Cache Compression Algorithm
Researchers have proposed using hardware data compression units within the memory hierarchies of microprocessors in order to improve performance, energy efficiency, and functional...
Xi Chen, Lei Yang, Haris Lekatsas, Robert P. Dick,...
ARCS
2006
Springer
13 years 8 months ago
Dynamic Dictionary-Based Data Compression for Level-1 Caches
Abstract. Data cache compression is actively studied as a venue to make better use of onchip transistors, increase apparent capacity of caches, and hide the long memory latencies. ...
Georgios Keramidas, Konstantinos Aisopos, Stefanos...
DAC
2000
ACM
14 years 5 months ago
Code compression for low power embedded system design
erse approaches at all levels of abstraction starting from the physical level up to the system level. Experience shows that a highlevel method may have a larger impact since the de...
Haris Lekatsas, Jörg Henkel, Wayne Wolf
ERLANG
2006
ACM
13 years 10 months ago
Concurrent caching
A concurrent cache design is presented which allows cached data to be spread across a cluster of computers. The implementation s persistent storage from cache storage and abstract...
Jay Nelson