169 search results - page 2 / 34 » Adaptive insertion policies for high performance caching |
ISCA
2011
IEEE
12 years 9 months ago
2011
IEEE
Inclusive last-level caches (LLCs) waste precious silicon estate due to cross-level replication of cache blocks. As the industry moves toward cache hierarchies with larger inner l...
ECRTS
2006
IEEE
13 years 11 months ago
2006
IEEE
Cache memories have been extensively used to bridge the gap between high speed processors and relatively slower main memories. However, they are sources of predictability problems...
ISCA
2005
IEEE
13 years 11 months ago
2005
IEEE
With the ability to place large numbers of transistors on a single silicon chip, manufacturers have begun developing chip multiprocessors (CMPs) containing multiple processor core...
ERLANG
2006
ACM
13 years 11 months ago
2006
ACM
A concurrent cache design is presented which allows cached data to be spread across a cluster of computers. The implementation s persistent storage from cache storage and abstract...
IPPS
2006
IEEE
13 years 11 months ago
2006
IEEE
In this paper, we present a dynamically reconfigurable cache architecture using adaptive block allocation policy analyzed by means of simulation. Our main objectives are: to propo...