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EH
2004
IEEE
110views Hardware» more  EH 2004»
13 years 9 months ago
A Genetic Algorithm for the Optimisation of a Reconfigurable Pipelined FFT Processor
This paper describes the optimisation of the word length in a 16-point radix-4 reconfigurable pipelined Fast Fourier Transform (FFT) based receiver device. Two forms of optimisati...
Nasri Sulaiman, Tughrul Arslan
IPPS
1999
IEEE
13 years 9 months ago
Reconfigurable Parallel Sorting and Load Balancing: HeteroSort
HeteroSort load balances and sorts within static or dynamic networks. Upon failure of a node or path, HeteroSort uses a genetic algorithm to minimize the distribution path by optim...
Emmett Davis, Bonnie Holte Bennett, Bill Wren, Lin...
CN
2007
221views more  CN 2007»
13 years 5 months ago
Adaptive design optimization of wireless sensor networks using genetic algorithms
We present a multi-objective optimization methodology for self-organizing, adaptive wireless sensor network design and energy management, taking into consideration application-spe...
Konstantinos P. Ferentinos, Theodore A. Tsiligirid...
ISMB
1994
13 years 6 months ago
High Speed Pattern Matching in Genetic Data Base with Reconfigurable Hardware
Homologydetection in large data bases is probably the most time consuming operation in molecular genetic computing systems. Moreover, the progresses made all around the world conc...
Eric Lemoine, Joël Quinqueton, Jean Sallantin
FCCM
2008
IEEE
133views VLSI» more  FCCM 2008»
13 years 11 months ago
Autonomous System on a Chip Adaptation through Partial Runtime Reconfiguration
This paper presents a proto-type autonomous signal processing system on a chip. The system is architected such that high performance digital signal processing occurs in the FPGAâ€...
Matthew French, Erik Anderson, Dong-In Kang