66 search results - page 12 / 14 » Aggregating processor free time for energy reduction |
CASES
2006
ACM
13 years 11 months ago
2006
ACM
The architectural design of embedded systems is becoming increasingly idiosyncratic to meet varying constraints regarding energy consumption, code size, and execution time. Tradit...
ASPLOS
2010
ACM
13 years 8 months ago
2010
ACM
Power consumption and DRAM latencies are serious concerns in modern chip-multiprocessor (CMP or multi-core) based compute systems. The management of the DRAM row buffer can signif...
DATE
2005
IEEE
13 years 11 months ago
2005
IEEE
— A novel power attack resistant cryptosystem is presented in this paper. Security in digital computing and communication is becoming increasingly important. Design techniques th...
ISCA
2006
IEEE
13 years 11 months ago
2006
IEEE
Level one cache normally resides on a processor’s critical path, which determines the clock frequency. Directmapped caches exhibit fast access time but poor hit rates compared w...
ICS
2003
Tsinghua U.
13 years 10 months ago
2003
Tsinghua U.
In high-performance wide-issue microprocessors the access time, energy and area of the register file are often critical to overall performance. This is because these pararmeters g...