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» Aggregating processor free time for energy reduction
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DEXAW
2007
IEEE
150views Database» more  DEXAW 2007»
14 years 3 days ago
Compressed Aggregations for mobile OLAP Dissemination
As wireless network infrastructure becomes more reliable, an increasing number of traditional desktop applications, beyond common web browsing, migrate to portable devices. Since ...
Ilias Michalarias, Arkadiy Omelchenko
CODES
2004
IEEE
13 years 9 months ago
Dynamic overlay of scratchpad memory for energy minimization
The memory subsystem accounts for a significant portion of the aggregate energy budget of contemporary embedded systems. Moreover, there exists a large potential for optimizing th...
Manish Verma, Lars Wehmeyer, Peter Marwedel
RTSS
1998
IEEE
13 years 10 months ago
Synthesis Techniques for Low-Power Hard Real-Time Systems on Variable Voltage Processors
The energy efficiency of systems-on-a-chip can be much improved if one were to vary the supply voltage dynamically at run time. In this paper we describe the synthesis of systems-...
Inki Hong, Gang Qu, Miodrag Potkonjak, Mani B. Sri...
IPPS
2009
IEEE
14 years 13 days ago
Double Throughput Multiply-Accumulate unit for FlexCore processor enhancements
— As a simple five-stage General-Purpose Processor (GPP), the baseline FlexCore processor has a limited set of datapath units. By utilizing a flexible datapath interconnect and...
Tung Thanh Hoang, Magnus Själander, Per Larss...
IPPS
2006
IEEE
13 years 11 months ago
An automated development framework for a RISC processor with reconfigurable instruction set extensions
By coupling a reconfigurable hardware to a standard processor, high levels of flexibility and adaptability are achieved. However, this approach requires modifications to the compi...
Nikolaos Vassiliadis, George Theodoridis, Spiridon...