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» Algorithm Transformation for FPGA Implementation
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DSD
2009
IEEE
147views Hardware» more  DSD 2009»
13 years 9 months ago
A High Performance Hardware Architecture for One Bit Transform Based Motion Estimation
Motion Estimation (ME) is the most computationally intensive part of video compression and video enhancement systems. One bit transform (1BT) based ME algorithms have low computat...
Abdulkadir Akin, Yigit Dogan, Ilker Hamzaoglu
FPGA
2001
ACM
152views FPGA» more  FPGA 2001»
13 years 10 months ago
A pipelined architecture for partitioned DWT based lossy image compression using FPGA's
Discrete wavelet transformations (DWT) followed by embedded zerotree encoding is a very efficient technique for image compression [2, 5, 4]. However, the algorithms proposed in l...
Jörg Ritter, Paul Molitor
FPL
2001
Springer
88views Hardware» more  FPL 2001»
13 years 10 months ago
FPGA-Based Discrete Wavelet Transforms System
Although FPGA technology offers the potential of designing high performance systems at low cost, its programming model is prohibitively low level. To allow a novice signal/image pr...
Mokhtar Nibouche, Ahmed Bouridane, Fionn Murtagh, ...
ICASSP
2010
IEEE
13 years 3 months ago
Bandwidth-intensive FPGA architecture for multi-dimensional DFT
Multi-dimensional (MD) Discrete Fourier Transform (DFT) is a key kernel algorithm in many signal processing algorithms, including radar data processing and medical imaging. Althou...
Chi-Li Yu, Chaitali Chakrabarti, Sungho Park, Vija...
ERSA
2007
142views Hardware» more  ERSA 2007»
13 years 7 months ago
An FPGA Implementation of Reciprocal Sums for SPME
Molecular Dynamics simulations have become an interesting target for acceleration using Field-Programmable Gate Arrays (FPGA). Still to be attempted completely in FPGA hardware is...
Sam Lee, Paul Chow