26 search results - page 1 / 6 » Algorithmic Implementation of Low-Power High Performance FIR... |
VLSID
2005
IEEE
14 years 5 months ago
2005
IEEE
This paper presents two schemes for the implementation of high performance and low power FIR filtering Intellectual Property (IP) cores. Low power is achieved through the utilizat...
ERSA
2006
13 years 6 months ago
2006
- This paper presents the design and implementation methodology of some low power programmable FIR filtering IP cores targeting SoRC and compares their performance in term of area,...
ISCAS
2003
IEEE
13 years 10 months ago
2003
IEEE
— The authors present a number of complete cores which are specially tailored for the low power implementation of FIR filters executed using block processing. The paper reveals t...
ISCAS
1999
IEEE
13 years 9 months ago
1999
IEEE
The authors present a multiplication algorithm for low power implementation of digital filters on CMOS based digital signal processing systems. The algorithm decomposes individual...
CDES
2006
13 years 6 months ago
2006
Abstract-- Digital signal processing (DSP) is used to perform filtering, decimation and down conversion in common communications systems, like in oversampling analog to digital con...