13 search results - page 2 / 3 » An 8x8 run-time reconfigurable FPGA embedded in a SoC |
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
Run-time reconfigurable logic is a very attractive alterative in the design of SoC. However, configuration overhead can largely decrease the system performance. In this work, we p...
DSD
2010
IEEE
13 years 2 months ago
2010
IEEE
Reconfigurable FPGA based Systems-on-Chip (SoC) architectures are increasingly becoming the preferred solution for implementing modern embedded systems, due to their flexible natur...
DATE
2007
IEEE
13 years 11 months ago
2007
IEEE
Individual Data Processing Units (DPUs) are commonly used for operational control and specific data processing of scientific space instruments. To overcome the limitations of trad...
ISCAS
2003
IEEE
13 years 10 months ago
2003
IEEE
Motion estimation is a complex computation found in video compression algorithms, such as standards like MPEG-4 and H.263. This paper proposes an embedded reconfigurable array for...
CODES
2009
IEEE
13 years 8 months ago
2009
IEEE
Field-Programmable Gate Arrays (FPGAs) have become promising mapping fabric for the implementation of System-on-Chip (SoC) platforms, due to their large capacity and their enhance...