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» An Abort-Aware Model of Transactional Programming
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FPGA
2007
ACM
124views FPGA» more  FPGA 2007»
13 years 12 months ago
A practical FPGA-based framework for novel CMP research
Chip-multiprocessors are quickly gaining momentum in all segments of computing. However, the practical success of CMPs strongly depends on addressing the difficulty of multithread...
Sewook Wee, Jared Casper, Njuguna Njoroge, Yuriy T...
ASPLOS
2006
ACM
13 years 11 months ago
AVIO: detecting atomicity violations via access interleaving invariants
Concurrency bugs are among the most difficult to test and diagnose of all software bugs. The multicore technology trend worsens this problem. Most previous concurrency bug detect...
Shan Lu, Joseph Tucek, Feng Qin, Yuanyuan Zhou
CODES
2009
IEEE
14 years 15 days ago
Using binary translation in event driven simulation for fast and flexible MPSoC simulation
In this paper, we investigate the use of instruction set simulators (ISS) based on binary translation to accelerate full timed multiprocessor system simulation at transaction leve...
Marius Gligor, Nicolas Fournel, Frédé...
PADL
2009
Springer
14 years 6 months ago
Ad Hoc Data and the Token Ambiguity Problem
Abstract. PADS is a declarative language used to describe the syntax and semantic properties of ad hoc data sources such as financial transactions, server logs and scientific data ...
Qian Xi, Kathleen Fisher, David Walker, Kenny Qili...
HPCA
2005
IEEE
14 years 6 months ago
SENSS: Security Enhancement to Symmetric Shared Memory Multiprocessors
With the increasing concern of the security on high performance multiprocessor enterprise servers, more and more effort is being invested into defending against various kinds of a...
Youtao Zhang, Lan Gao, Jun Yang 0002, Xiangyu Zhan...