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DAC
1996
ACM
13 years 10 months ago
Address Calculation for Retargetable Compilation and Exploration of Instruction-Set Architectures
The advent of parallel executing Address Calculation Units (ACUs) in Digital Signal Processor (DSP) and Application Specific InstructionSet Processor (ASIP) architectures has made...
Clifford Liem, Pierre G. Paulin, Ahmed Amine Jerra...
WICSA
2004
13 years 7 months ago
Compositional Generation of Software Architecture Performance QN Models
Early performance analysis based on Queueing Network Models (QNM) has been often proposed to support software designers during the software development process. These approaches a...
Antinisca Di Marco, Paola Inverardi
FPL
2008
Springer
119views Hardware» more  FPL 2008»
13 years 7 months ago
Polymorphic wavelet architectures using reconfigurable hardware
Traditional microprocessor-based solutions are insufficient to serve the dynamic throughput demands of real-time scalable multimedia processing systems. This paper introduces a Po...
Amit Pande, Joseph Zambreno
ICIP
2010
IEEE
13 years 3 months ago
Comparison of registration methods using mamographic images
The detection of architectural distortions and abnormal structures in mammographic images can be based on the analysis of bilateral and temporal cases using image registration. Th...
Yago Diez, Arnau Oliver, Xavier Lladó, Robe...
ICPPW
2006
IEEE
13 years 11 months ago
Model-Based OpenMP Implementation of a 3D Facial Pose Tracking System
Abstract— Most image processing applications are characterized by computation-intensive operations, and high memory and performance requirements. Parallelized implementation on s...
Sankalita Saha, Chung-Ching Shen, Chia-Jui Hsu, Ga...