89 search results - page 4 / 18 » An Architecture for Combined Test Data Compression and Abort... |
ITC
2003
IEEE
13 years 10 months ago
2003
IEEE
Store-and-generate techniques encode a given test set and regenerate the original test set during the test with the help of a decoder. Previous research has shown that runlength c...
ICCAD
2004
IEEE
14 years 2 months ago
2004
IEEE
— In this paper we investigate an effective approach to construct a linear decompression network in the multiple scan chain architecture. A minimal pin architecture, complemented...
ADBIS
2007
Springer
13 years 11 months ago
2007
Springer
This paper describes a new XML compression scheme that offers both high compression ratios and short query response time. Its core is a fully reversible transform featuring substit...
ITC
2000
IEEE
13 years 9 months ago
2000
IEEE
A common approachfor large industrial designs is to use logic built-in self-test (LBIST)followed by test data from an external tester. Because the fault coverage with LBIST alone ...
DFT
2005
IEEE
13 years 11 months ago
2005
IEEE
In this paper, we propose a system-level error tolerance scheme for systems where a linear transform is combined with quantization. These are key components in multimedia compress...