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CC
2007
Springer
126views System Software» more  CC 2007»
13 years 11 months ago
An Array Allocation Scheme for Energy Reduction in Partitioned Memory Architectures
This paper presents a compiler technique that reduces the energy consumption of the memory subsystem, for an off-chip partitioned memory architecture having multiple memory banks ...
K. Shyam, R. Govindarajan
LCTRTS
2007
Springer
13 years 11 months ago
Compiler-managed partitioned data caches for low power
Set-associative caches are traditionally managed using hardwarebased lookup and replacement schemes that have high energy overheads. Ideally, the caching strategy should be tailor...
Rajiv A. Ravindran, Michael L. Chu, Scott A. Mahlk...
TVLSI
2008
169views more  TVLSI 2008»
13 years 4 months ago
Energy-Aware Flash Memory Management in Virtual Memory System
The traditional virtual memory system is designed for decades assuming a magnetic disk as the secondary storage. Recently, flash memory becomes a popular storage alternative for ma...
Han-Lin Li, Chia-Lin Yang, Hung-Wei Tseng
GLOBECOM
2009
IEEE
13 years 8 months ago
Energy-Efficient Multi-Pipeline Architecture for Terabit Packet Classification
Energy efficiency has become a critical concern in designing high speed packet classification engines for next generation routers. Although TCAM-based solutions can provide high th...
Weirong Jiang, Viktor K. Prasanna
ISCAS
2008
IEEE
136views Hardware» more  ISCAS 2008»
13 years 11 months ago
"Green" micro-architecture and circuit co-design for ternary content addressable memory
—In this paper, an energy-efficient and high performance ternary content addressable memory (TCAM) are presented. It employs the concept of “green” microarchitecture and circ...
Po-Tsang Huang, Shu-Wei Chang, Wen-Yen Liu, Wei Hw...