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» An Automatic Test Pattern Generator for Large Sequential Cir...
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BMCBI
2010
161views more  BMCBI 2010»
13 years 3 months ago
Application of Wavelet Packet Transform to detect genetic polymorphisms by the analysis of inter-Alu PCR patterns
Background: The analysis of Inter-Alu PCR patterns obtained from human genomic DNA samples is a promising technique for a simultaneous analysis of many genomic loci flanked by Alu...
Maurizio Cardelli, Matteo Nicoli, Armando Bazzani,...
ITC
1997
IEEE
119views Hardware» more  ITC 1997»
13 years 9 months ago
Testability Analysis and ATPG on Behavioral RT-Level VHDL
This paper proposes an environment to address Testability Analysis and Test Pattern Generation on VHDL descriptions at the RT-level. The proposed approach, based on a suitable fau...
Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
MEMOCODE
2007
IEEE
14 years 1 days ago
Combining Multi-Valued Logics in SAT-based ATPG for Path Delay Faults
Due to the rapidly growing speed and the decreasing size of gates in modern chips, the probability of faults caused by the production process grows. Already small variations lead ...
Stephan Eggersglüß, Görschwin Fey,...
ICCAD
2002
IEEE
142views Hardware» more  ICCAD 2002»
14 years 2 months ago
SAT and ATPG: Boolean engines for formal hardware verification
In this survey, we outline basic SAT- and ATPGprocedures as well as their applications in formal hardware verification. We attempt to give the reader a trace trough literature and...
Armin Biere, Wolfgang Kunz
DAC
2010
ACM
13 years 9 months ago
Efficient fault simulation on many-core processors
Fault simulation is essential in test generation, design for test and reliability assessment of integrated circuits. Reliability analysis and the simulation of self-test structure...
Michael A. Kochte, Marcel Schaal, Hans-Joachim Wun...