6 search results - page 1 / 2 » An Efficient Algorithm for Calculating the Worst-case Delay ... |
ICCD
2003
IEEE
14 years 1 months ago
2003
IEEE
Analyzing the effect of crosstalk on delay is critical for high performance circuits. The major bottleneck in performing crosstalkinduced delay analysis is the high computational ...
ICCAD
2006
IEEE
14 years 1 months ago
2006
IEEE
With shrinking feature size and growing integration density in the Deep Sub-Micron technologies, the global buses are fast becoming the “weakest-links” in VLSI design. They ha...
ISPD
2003
ACM
13 years 10 months ago
2003
ACM
We propose a method to capture crosstalk-induced noisy waveform for crosstalk-aware static timing analysis. The effects of capacitive coupling noise on timing are conventionally m...
ET
2002
13 years 4 months ago
2002
Due to technology scaling and increasing clock frequency, problems due to noise effects lead to an increase in design/debugging efforts and a decrease in circuit performance. This...
DAC
1996
ACM
13 years 8 months ago
1996
ACM
1- A methodology is presented in this paper for determining an optimal set of clock path delays for designing high performance VLSI/ULSI-based clock distribution networks. This met...