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» An Efficient Hardware Support for Control Data Validation
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TACO
2008
130views more  TACO 2008»
13 years 5 months ago
Efficient hardware code generation for FPGAs
r acceptance of FPGAs as a computing device requires a higher level of programming abstraction. ROCCC is an optimizing C to HDL compiler. We describe the code generation approach i...
Zhi Guo, Walid A. Najjar, Betul Buyukkurt
ATS
2010
IEEE
250views Hardware» more  ATS 2010»
13 years 2 months ago
Efficient Embedding of Deterministic Test Data
Systems with many integrated circuits (ICs), often of the same type, are increasingly common to meet the constant performance demand. However, systems in recent semiconductor techn...
Mudassar Majeed, Daniel Ahlstrom, Urban Ingelsson,...
MICRO
2003
IEEE
142views Hardware» more  MICRO 2003»
13 years 10 months ago
Hardware Support for Control Transfers in Code Caches
Many dynamic optimization and/or binary translation systems hold optimized/translated superblocks in a code cache. Conventional code caching systems suffer from overheads when con...
Ho-Seop Kim, James E. Smith
CSE
2009
IEEE
13 years 9 months ago
Reliable Identities Using Off-the-Shelf Hardware Security in MANETs
Application scenarios for mobile ad-hoc networks (MANETs) impose a variety of non-standard security requirements. furthermore, in many scenarios owner and user of devices do not a...
Nicolai Kuntze, Andreas Fuchs, Carsten Rudolph
MICRO
2010
IEEE
202views Hardware» more  MICRO 2010»
13 years 4 days ago
Hardware Support for Relaxed Concurrency Control in Transactional Memory
Today's transactional memory systems implement the two-phase-locking (2PL) algorithm which aborts transactions every time a conflict happens. 2PL is a simple algorithm that pr...
Utku Aydonat, Tarek S. Abdelrahman