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ITC
1995
IEEE
124views Hardware» more  ITC 1995»
13 years 8 months ago
An Experimental Chip to Evaluate Test Techniques: Experiment Results
This paper describes the testing of a chip especially designed to facilitate the evaluation of various test techniques for combinational circuitry. The different test sets and tes...
Siyad C. Ma, Piero Franco, Edward J. McCluskey
ITC
1995
IEEE
116views Hardware» more  ITC 1995»
13 years 8 months ago
An Experimental Chip to Evaluate Test Techniques: Chip and Experiment Design
An experiment has been designed to evaluate multiple testing techniques for combinational circuits. To perform the experiment, a 25k gate CMOS Test Chip has been designed, manufac...
Piero Franco, William D. Farwell, Robert L. Stokes...
ITC
1996
IEEE
96views Hardware» more  ITC 1996»
13 years 9 months ago
Analysis and Detection of Timing Failures in an Experimental Test Chip
A 25k gate Test Chip was designed and manufactured to evaluate different test methods for scan-designed circuits. The design of the chip, the experiment, and preliminary experimen...
Piero Franco, Siyad C. Ma, Jonathan Chang, Yi-Chin...
VTS
1998
IEEE
98views Hardware» more  VTS 1998»
13 years 9 months ago
Experimental Results for IDDQ and VLV Testing
An experimental test chip was designed and manufactured to evaluate different test techniques. Based on the results presented in the wafer probe, 309 out of 5491 dies that passed ...
Jonathan T.-Y. Chang, Chao-Wen Tseng, Yi-Chin Chu,...
ISESE
2003
IEEE
13 years 10 months ago
An Experimental Evaluation of Inspection and Testing for Detection of Design Faults
The two most common strategies for verification and validation, inspection and testing, are in a controlled experiment evaluated in terms of their fault detection capabilities. Th...
Carina Andersson, Thomas Thelin, Per Runeson, Nina...