6 search results - page 1 / 2 » An ILP Formulation for Yield-driven Architectural Synthesis |
DFT
2005
IEEE
13 years 10 months ago
2005
IEEE
Data flow graph dominant designs, such as communication video and audio applications, are common in today’s IC industry. In these designs, the datapath resources (e.g., adders,...
DAC
1999
ACM
13 years 8 months ago
1999
ACM
In this paper, we present a new method to the built-in selftestable data path synthesis based on integer linear programming (ILP). Our method performs system register assignment, ...
ISLPED
2003
ACM
13 years 9 months ago
2003
ACM
This paper proposes two very fast graph theoretic heuristics for the low power binding problem given fixed number of resources and multiple architectures for the resources. First...
ASPDAC
2008
ACM
13 years 6 months ago
2008
ACM
In deep submicron technology, wire delay is no longer negligible and is gradually dominating the system latency. Some state-of-the-art architectural synthesis flows adopt the distr...
LCTRTS
2001
Springer
13 years 9 months ago
2001
Springer
The IA-64 architecture has been designed as a synthesis of VLIW and superscalar design principles. It incorporates typical functionality known from embedded processors as multiply...